Azadeh Davoodi
American companies often rely on overseas foundries to manufacture computer chips—largely because internationally owned corporations control more than 90 percent of the world’s fabrication capacity. To help protect American trade secrets, Azadeh Davoodi, an associate professor of electrical and computer engineering at the University of Wisconsin-Madison, is developing a fabrication technique called split manufacturing, where foundries that could pose security risks receive only a select portion of a computer chip’s design so that the final product can be assembled later at a secure facility.
Davoodi plans to use machine learning to help determine what components of a design are safe to share as well as create tools to confound any attempts to reverse engineer computer chips from partial instructions. The effort received joint support from the Semiconductor Research Corporation (SRC) and the Secure, Trustworthy, Assured and Resilient Semiconductors and Systems (STARSS) initiative, which falls under the auspices of the National Science Foundation’s Secure and Trustworthy Cyberspace (SaTC) program. The grant provides $468,000 of support over three years.