Electrical engineers at the University of Wisconsin-Madison have developed and tested an integrated photonic memory chip, a key component in realizing ultrafast photonic computing. The chip—which leverages parts and fabrication techniques already in use by established semiconductor foundries—could soon bring optical computing connectivity to data centers and high-performance computing systems.
The device was designed and tested by Akhilesh Jaiswal, a UW-Madison assistant professor of electrical and computer engineering, PhD student Md Abdullah-Al Kaiser, and colleagues in the University of Southern California Information Sciences Institute. The team presented its research in December 2025 in San Francisco at the International Electron Devices Meeting, the flagship conference for electronic device designers.
“This memory can store light and operate at speeds beyond the reach of its electrical counterpart memory,” says Jaiswal. “This is the first ever solution that provides a viable pathway to a scalable photonic memory on a commercial foundry process that can be volume-manufactured right away.”
Computing power has increased exponentially over the last half century; in fact, computers are so fast that one of the major bottlenecks to increasing processing speed is electricity itself. Electrical systems and components are fundamentally limited by the resistance and capacitance of metal wires, which put a hard speed limit on how fast information can travel.
That’s why, in recent years, researchers and chip manufacturers have created optical computing systems, where laser pulses traveling at the speed of light are used for computation instead of electricity. However, researchers still need to figure out how to create optical analogues of all the necessary computer components. That means most optical systems are electrical/optical hybrids, in which signals are converted from light to electricity and back again, negating some of the advantages.
One critical component with no immediate practical optical alternative is memory, where information is stored or buffered before reaching a computer processor. Researchers have developed many possible solutions, but they all have tradeoffs when it comes to size, speed, energy use or compatibility with existing manufacturing processes that make them difficult to scale.
Jaiswal and his collaborators, however, created a photonic memory using a design they call a “cross-coupled, differential, regenerative photonic latch” (pLatch) circuit. This novel component uses a combination of tiny photodiodes, micro-ring resonators and optical waveguides. Together, the devices create an optical analog of SRAM, the type of memory used in electricity-based computer processors.
“In principle, it has all the same capabilities of the electrical SRAM, but is much faster,” says Jaiswal. “An electrical SRAM operates at two or three gigahertz. In our simulations, we see the pLatch operate at 20 gigahertz, and the read speed could be 50 or 60 gigahertz.”
A key drawback to the device, and one that affects photonic components in general, is its size. While electronic computer components have shrunk to the nanoscale—used to describe the size of atoms—photonics are still at the micro level, the scale used to measure the thickness of a sheet of paper.
The size means optical computing can’t currently power processors inside cellphones or desktop computers. As large optical “interposers,” however, they are useful in linking many different processors. They can be used to tie together racks of servers in data centers to help them work in unison, and they offer a similar function in bringing optical speeds to the multi-processor systems used for high-performance computing and large-scale simulations.
While finding a unique solution to the optical computing bottleneck is an achievement, the team thinks the most important part of its circuit is its practicality. The researchers developed the design in consultation with cutting-edge chip fabrication firms AIM Photonics and GlobalFoundries, using their silicon photonics platform to fabricate the pLatch device.
“Our solution only uses those components that are currently available in a commercial foundry,” says Jaiswal. “We are not using exotic processes or materials. This design could be fabricated in volume today by companies like Global Foundries or other key semiconductor manufacturers, if needed.”
The Wisconsin Alumni Research Foundation has already helped the team secure several patents for the technology, and it is helping Jaiswal commercialize the technology.
Top image: Akhilesh Jaiswal (left) and Md Abdullah-Al Kaiser. Photo: Joel Hallberg.
Other authors include Sugeet Sunder and Ajey P. Jacob of the University of Southern California. The authors acknowledge support from DARPA (grant N660012424003).